Project

Reconfigurable Computing and High-level Design

Using FPGAs as accelerators in high-performance computing, with a focus on high-level design and synthesis techniques.

This set of research projects concentrates on reconfigurable computing — the use of FPGAs in high-performance computing. Here, FPGAs are used as computing accelerators in combination with a general-purpose processor, with special focus on high-level design and synthesis techniques.

SKA — Square Kilometre Array

FPGA-based high-performance computing and high-level design for the world's largest radio astronomy project, the Square Kilometre Array (SKA). The PARC lab is officially involved in the SKA's CSP (Central Signal Processor) package, working on correlator design and pulsar search in collaboration with the University of Manchester. Using high-level design and synthesis with OpenCL, the team investigates high-performance, low-power signal processing solutions on FPGAs. This involvement is supported by MBIE funding for the NZ SKA Alliance.

cellml-opt — Domain-specific optimisation of CellML models

A source-to-source compiler that applies a combination of standard LLVM passes and domain-specific optimisations to the equation systems found in CellML models. Input and output are C files as generated by the CellML framework's C Code Generation Service. Done in collaboration with the Technical University of Darmstadt (Julian Oppermann and Andreas Koch).